Hello, I have been working on bringing the PXA168 support in the kernel up to snuff. I found several mistakes in the clock muxing, and began work on getting the SDHC controllers hooked up properly. I've been testing these changes on a device that uses the PXA168 (Chumby 8). I'm a little unsure if I'm following the correct approach in the last two patches, and would definitely appreciate some feedback if there is a more appropriate way to handle this situation where two peripherals share a clock enable in a single register. In particular, I wasn't sure if creating the shared clocks without a parent at all would be okay: [11/12] dt-bindings: marvell,pxa168: add clock ids for SDH AXI clocks [12/12] clk: mmp: pxa168: control shared SDH bits with separate clock I'm aware that checkpatch warns about the long lines, but I was unsure if that actually mattered given that the existing file also has the warnings. I plan on continuing to work on additional PXA168 fixes over time. Thanks, Doug
