On 6/12/22 02:30, Shawn Guo wrote:
On Sat, May 21, 2022 at 05:07:50PM +0200, Marek Vasut wrote:Add SNVS LPGPR bindings on this system, the LPGPR is used to store boot counter. Signed-off-by: Marek Vasut <marex@xxxxxxx> Cc: Fabio Estevam <festevam@xxxxxxx> Cc: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx> Cc: Peng Fan <peng.fan@xxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: Shawn Guo <shawnguo@xxxxxxxxxx> Cc: NXP Linux Team <linux-imx@xxxxxxx> Cc: devicetree@xxxxxxxxxxxxxxx To: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx --- NOTE: Depends on https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20 --- arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts index 92eaf4ef45638..6956c9bb992be 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts @@ -303,6 +303,12 @@ &sai2 { status = "disabled"; };+&snvs {+ snvs-lpgpr { + compatible = "fsl,imx7d-snvs-lpgpr";Should we encode imx8mm specific compatible as well, while you added it in the bindings? Also this is a SoC rather than board device, so we may want to add it in soc.dtsi instead?
Right, this patch is already superseded by [PATCH] arm64: dts: imx8mm: Add SNVS LPGPR
