On 01/06/2022 08:56, Krishna Kurapati wrote:
> Add support for overriding electrical signal tuning parameters for
> SNPS HS Phy.
>
> Signed-off-by: Krishna Kurapati <quic_kriskura@xxxxxxxxxxx>
> Reviewed-by: Pavankumar Kondeti <quic_pkondeti@xxxxxxxxxxx>
> ---
> drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 267 +++++++++++++++++++++++++-
> 1 file changed, 265 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
> index 5d20378..14bbb06 100644
> --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
> +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
> @@ -52,6 +52,12 @@
> #define USB2_SUSPEND_N BIT(2)
> #define USB2_SUSPEND_N_SEL BIT(3)
>
> +#define USB2_PHY_USB_PHY_HS_PHY_OVERRIDE_X0 (0x6c)
> +#define USB2_PHY_USB_PHY_HS_PHY_OVERRIDE_X1 (0x70)
> +#define USB2_PHY_USB_PHY_HS_PHY_OVERRIDE_X2 (0x74)
> +#define USB2_PHY_USB_PHY_HS_PHY_OVERRIDE_X3 (0x78)
> +#define PARAM_OVRD_MASK 0xFF
> +
> #define USB2_PHY_USB_PHY_CFG0 (0x94)
> #define UTMI_PHY_DATAPATH_CTRL_OVERRIDE_EN BIT(0)
> #define UTMI_PHY_CMN_CTRL_OVERRIDE_EN BIT(1)
> @@ -60,12 +66,76 @@
> #define REFCLK_SEL_MASK GENMASK(1, 0)
> #define REFCLK_SEL_DEFAULT (0x2 << 0)
>
> +#define HS_DISCONNECT_MASK GENMASK(2, 0)
> +
> +#define SQUELCH_DETECTOR_MASK GENMASK(7, 5)
> +
I wonder why do you have here blank lines after every define. Are these
bits from different registers?
> +#define HS_AMPLITUDE_MASK GENMASK(3, 0)
> +
> +#define PREEMPHASIS_DURATION_MASK BIT(5)
> +
> +#define PREEMPHASIS_AMPLITUDE_MASK GENMASK(7, 6)
These two look like from same register...
> +
> +#define HS_RISE_FALL_MASK GENMASK(1, 0)
> +
> +#define HS_CROSSOVER_VOLTAGE_MASK GENMASK(3, 2)
> +
> +#define HS_OUTPUT_IMPEDANCE_MASK GENMASK(5, 4)
The same
> +
> +#define LS_FS_OUTPUT_IMPEDANCE_MASK GENMASK(3, 0)
> +
> +
> static const char * const qcom_snps_hsphy_vreg_names[] = {
> "vdda-pll", "vdda33", "vdda18",
> };
>
> #define SNPS_HS_NUM_VREGS ARRAY_SIZE(qcom_snps_hsphy_vreg_names)
>
> +struct override_param {
> + s32 value;
> + u8 reg;
> +};
> +
> +#define OVERRIDE_PARAM(bps, val)\
> +{ \
> + .value = bps, \
> + .reg = val, \
> +}
> +
> +struct override_param_map {
> + struct override_param *param_table;
> + u8 table_size;
> + u8 reg_offset;
> + u8 param_mask;
> +};
> +
> +#define OVERRIDE_PARAM_MAP(table, num_elements, offset, mask) \
> +{ \
> + .param_table = table, \
> + .table_size = num_elements, \
> + .reg_offset = offset, \
> + .param_mask = mask, \
> +}
> +
> +struct phy_override_seq {
> + bool need_update;
> + u8 offset;
> + u8 value;
> + u8 mask;
> +};
> +
> +static const char *phy_seq_props[] = {
static const char * const
> + "qcom,hs-disconnect-bp",
> + "qcom,squelch-detector-bp",
> + "qcom,hs-amplitude-bp",
> + "qcom,pre-emphasis-duration-bp",
> + "qcom,pre-emphasis-amplitude-bp",
> + "qcom,hs-rise-fall-time-bp",
> + "qcom,hs-crossover-voltage-microvolt",
> + "qcom,hs-output-impedance-micro-ohms",
> + "qcom,ls-fs-output-impedance-bp",
> +};
> +
> /**
> * struct qcom_snps_hsphy - snps hs phy attributes
> *
> @@ -91,6 +161,7 @@ struct qcom_snps_hsphy {
>
> bool phy_initialized;
> enum phy_mode mode;
> + struct phy_override_seq update_seq_cfg[ARRAY_SIZE(phy_seq_props)];
> };
>
> static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
> @@ -173,10 +244,147 @@ static int qcom_snps_hsphy_set_mode(struct phy *phy, enum phy_mode mode,
> return 0;
> }
>
> +static struct override_param hs_disconnect_sc7280[] = {
This should be const. I see you are using it in non-const way and this
makes me wonder why... You just need to store the value from the DT and
program it (after converting the units). Why modifying static driver
data? What if you have two phy drivers? Which data is being used?
IOW, all these tables should be const and you could store the final
value in 'struct qcom_snps_hsphy'. Then just program to registers this
final value.
Best regards,
Krzysztof
