> Subject: [PATCH v2 5/7] ufs: ufs-exynos: add mphy apb clock mask > > Bit[3] of HCI_CLKSTOP_CTRL register is for enabling/disabling MPHY APB > clock. Lets add it to CLK_STOP_MASK, so that the same can be controlled > during clock masking/unmasking. > > Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx> Reviewed-by: Chanho Park <chanho61.park@xxxxxxxxxxx> And tested on my ExynosAutov9 SADK board. Tested-by: Chanho Park <chanho61.park@xxxxxxxxxxx> Best Regards, Chanho Park
