Having a gap in the address space leads to read issues with NVMe SSDs. Fixup the address space. Signed-off-by: Peter Geis <pgwipeout@xxxxxxxxx> --- It seems this address space change was lost in one of my rebases. This fixes up my original patch to correct issues with NVMe SSDs. It's based off Heiko's v5.20-armsoc/dts64 at: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/?h=v5.20-armsoc/dts64 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 99ab013b8ba4..cc1c5a65c5e5 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -839,7 +839,7 @@ pcie2x1: pcie@fe260000 { compatible = "rockchip,rk3568-pcie"; reg = <0x3 0xc0000000 0x0 0x00400000>, <0x0 0xfe260000 0x0 0x00010000>, - <0x3 0x00000000 0x0 0x01000000>; + <0x3 0x3f000000 0x0 0x01000000>; reg-names = "dbi", "apb", "config"; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, @@ -868,8 +868,8 @@ pcie2x1: pcie@fe260000 { phys = <&combphy2 PHY_TYPE_PCIE>; phy-names = "pcie-phy"; power-domains = <&power RK3568_PD_PIPE>; - ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000 - 0x02000000 0x0 0x02000000 0x3 0x01100000 0x0 0x3ef00000>; + ranges = <0x01000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x00100000 + 0x02000000 0x0 0x00000000 0x3 0x00000000 0x0 0x3ef00000>; resets = <&cru SRST_PCIE20_POWERUP>; reset-names = "pipe"; #address-cells = <3>; -- 2.25.1
