> > LAN966x SoC flexcoms has two optional I/O lines. Namely, CS0 and CS1 in > > flexcom SPI mode. CTS and RTS in flexcom USART mode. These pins > > can be mapped to lan966x FLEXCOM_SHARED[0-20] pins and usage > depends on > > functions being configured. > > > > Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@xxxxxxxxxxxxx> > > --- > > .../bindings/mfd/atmel,flexcom.yaml | 21 ++++++++++++++++++- > > 1 file changed, 20 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml > b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml > > index 221bd840b49e..6050482ad8ef 100644 > > --- a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml > > +++ b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml > > @@ -16,7 +16,9 @@ description: > > > > properties: > > compatible: > > - const: atmel,sama5d2-flexcom > > + enum: > > + - atmel,sama5d2-flexcom > > + - microchip,lan966x-flexcom > > Your new v1 is here worse than old v2, where this was just simple > extension of existing enum. Why did you change it? > I introduced new compatible string for lan966x and also I have new DT properties "microchip,flx-shrd-pins" and "microchip,flx-cs-names". > > Best regards, > Krzysztof
