On Fri, 2022-05-13 at 17:06 +0200, AngeloGioacchino Del Regno wrote:
> The MediaTek Helio X10 (MT6795) SoC has 5 LARBs and one common SMI
> instance without any sub-common and without GALS.
>
> While the smi-common configuration is specific to this SoC, on the
> LARB side, this is similar to MT8173, in the sense that it doesn't
> need the port in LARB, and the register layout is also compatible
> with that one, which makes us able to fully reuse the smi-larb
> platform data struct that was introduced for MT8173.
>
> Signed-off-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@xxxxxxxxxxxxx>
> ---
> drivers/memory/mtk-smi.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
> index 86a3d34f418e..7e7c3ede19e4 100644
> --- a/drivers/memory/mtk-smi.c
> +++ b/drivers/memory/mtk-smi.c
> @@ -21,11 +21,13 @@
> /* SMI COMMON */
> #define SMI_L1LEN 0x100
>
> +#define SMI_L1_ARB 0x200
> #define SMI_BUS_SEL 0x220
> #define SMI_BUS_LARB_SHIFT(larbid) ((larbid) << 1)
> /* All are MMU0 defaultly. Only specialize mmu1 here. */
> #define F_MMU1_LARB(larbid) (0x1 <<
> SMI_BUS_LARB_SHIFT(larbid))
>
> +#define SMI_FIFO_TH0 0x230
Does the name come from the coda you got?
It is called SMI_READ_FIFO_TH in my coda.
> #define SMI_M4U_TH 0x234
> #define SMI_FIFO_TH1 0x238
> #define SMI_FIFO_TH2 0x23c
> @@ -360,6 +362,7 @@ static const struct of_device_id
> mtk_smi_larb_of_ids[] = {
> {.compatible = "mediatek,mt2701-smi-larb", .data =
> &mtk_smi_larb_mt2701},
> {.compatible = "mediatek,mt2712-smi-larb", .data =
> &mtk_smi_larb_mt2712},
> {.compatible = "mediatek,mt6779-smi-larb", .data =
> &mtk_smi_larb_mt6779},
> + {.compatible = "mediatek,mt6795-smi-larb", .data =
> &mtk_smi_larb_mt8173},
> {.compatible = "mediatek,mt8167-smi-larb", .data =
> &mtk_smi_larb_mt8167},
> {.compatible = "mediatek,mt8173-smi-larb", .data =
> &mtk_smi_larb_mt8173},
> {.compatible = "mediatek,mt8183-smi-larb", .data =
> &mtk_smi_larb_mt8183},
> @@ -541,6 +544,13 @@ static struct platform_driver
> mtk_smi_larb_driver = {
> }
> };
>
> +static const struct mtk_smi_reg_pair
> mtk_smi_common_mt6795_init[SMI_COMMON_INIT_REGS_NR] = {
> + {SMI_L1_ARB, 0x1b},
> + {SMI_M4U_TH, 0xce810c85},
> + {SMI_FIFO_TH1, 0x43214c8},
> + {SMI_FIFO_TH0, 0x191f},
> +};
> +
> static const struct mtk_smi_reg_pair
> mtk_smi_common_mt8195_init[SMI_COMMON_INIT_REGS_NR] = {
> {SMI_L1LEN, 0xb},
> {SMI_M4U_TH, 0xe100e10},
> @@ -565,6 +575,12 @@ static const struct mtk_smi_common_plat
> mtk_smi_common_mt6779 = {
> F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
> };
>
> +static const struct mtk_smi_common_plat mtk_smi_common_mt6795 = {
> + .type = MTK_SMI_GEN2,
> + .bus_sel = BIT(0),
Like the other larbs, use F_MMU1_LARB(0) here?
After the two changes,
Reviewed-by: Yong Wu <yong.wu@xxxxxxxxxxxx>
Thanks.
> + .init = mtk_smi_common_mt6795_init,
> +};
> +
> static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
> .type = MTK_SMI_GEN2,
> .has_gals = true,
> @@ -609,6 +625,7 @@ static const struct of_device_id
> mtk_smi_common_of_ids[] = {
> {.compatible = "mediatek,mt2701-smi-common", .data =
> &mtk_smi_common_gen1},
> {.compatible = "mediatek,mt2712-smi-common", .data =
> &mtk_smi_common_gen2},
> {.compatible = "mediatek,mt6779-smi-common", .data =
> &mtk_smi_common_mt6779},
> + {.compatible = "mediatek,mt6795-smi-common", .data =
> &mtk_smi_common_mt6795},
> {.compatible = "mediatek,mt8167-smi-common", .data =
> &mtk_smi_common_gen2},
> {.compatible = "mediatek,mt8173-smi-common", .data =
> &mtk_smi_common_gen2},
> {.compatible = "mediatek,mt8183-smi-common", .data =
> &mtk_smi_common_mt8183},
