On Wed, May 04, 2022 at 12:46:24AM +0300, Serge Semin wrote: > Printing just "link up" isn't that much informative especially when it > comes to working with the PCI Express bus. Even if the link is up, due to > multiple reasons the bus performance can degrade to slower speeds or to > narrower width than both Root Port and its partner is capable of. In that > case it would be handy to know the link specifications as early as > possible. So let's add a more verbose message to the busy-wait link-state > method, which will contain the link speed generation and the PCIe bus > width in case if the link up state is discovered. Otherwise an error will > be printed to the system log. > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > > --- > > Changelog v2: > - Test the error condition first and return straight away if it comes true. > The typical return is better to be unindented (@Joe). > --- > drivers/pci/controller/dwc/pcie-designware.c | 22 ++++++++++++++------ > 1 file changed, 16 insertions(+), 6 deletions(-) Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
