The Asurada platform has five I2C controllers and two SPI controllers
that are used. In preparation for enabling the devices connected to
these controllers, enable and configure their busses.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
---
(no changes since v1)
.../boot/dts/mediatek/mt8192-asurada.dtsi | 130 ++++++++++++++++++
1 file changed, 130 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
index 5cb7580a13cf..3c5b1e475cf6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
@@ -85,6 +85,47 @@ ppvar_sys: ppvar-sys {
};
};
+&i2c0 {
+ status = "okay";
+
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+};
+
+&i2c1 {
+ status = "okay";
+
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+};
+
+&i2c2 {
+ status = "okay";
+
+ clock-frequency = <400000>;
+ clock-stretch-ns = <12600>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+};
+
+&i2c3 {
+ status = "okay";
+
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+};
+
+&i2c7 {
+ status = "okay";
+
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7_pins>;
+};
+
&pio {
/* 220 lines */
gpio-line-names = "I2S_DP_LRCK",
@@ -311,6 +352,95 @@ &pio {
"AUD_DAT_MOSI1",
"AUD_DAT_MISO0",
"AUD_DAT_MISO1";
+
+ i2c0_pins: i2c0-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
+ <PINMUX_GPIO205__FUNC_SDA0>;
+ bias-pull-up;
+ mediatek,pull-up-adv = <3>;
+ mediatek,drive-strength-adv = <7>;
+ };
+ };
+
+ i2c1_pins: i2c1-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
+ <PINMUX_GPIO119__FUNC_SDA1>;
+ bias-pull-up;
+ mediatek,pull-up-adv = <3>;
+ mediatek,drive-strength-adv = <7>;
+ };
+ };
+
+ i2c2_pins: i2c2-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
+ <PINMUX_GPIO142__FUNC_SDA2>;
+ bias-pull-up;
+ mediatek,pull-up-adv = <3>;
+ mediatek,drive-strength-adv = <0>;
+ };
+ };
+
+ i2c3_pins: i2c3-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
+ <PINMUX_GPIO161__FUNC_SDA3>;
+ bias-disable;
+ mediatek,drive-strength-adv = <7>;
+ };
+ };
+
+ i2c7_pins: i2c7-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
+ <PINMUX_GPIO125__FUNC_SDA7>;
+ bias-disable;
+ mediatek,drive-strength-adv = <7>;
+ };
+ };
+
+ spi1_pins: spi1-default-pins {
+ pins-cs-mosi-clk {
+ pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
+ <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
+ <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
+ bias-disable;
+ };
+
+ pins-miso {
+ pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
+ bias-pull-down;
+ };
+ };
+
+ spi5_pins: spi5-default-pins {
+ pins-bus {
+ pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
+ <PINMUX_GPIO37__FUNC_GPIO37>,
+ <PINMUX_GPIO39__FUNC_SPI5_A_MO>,
+ <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
+ bias-disable;
+ };
+ };
+};
+
+&spi1 {
+ status = "okay";
+
+ mediatek,pad-select = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+};
+
+&spi5 {
+ status = "okay";
+
+ cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
+ mediatek,pad-select = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi5_pins>;
};
&uart0 {
--
2.36.0
