On 04/05/2022 09:51, Hector Martin wrote: > This binding represents the cpufreq/DVFS hardware present in Apple SoCs. > The hardware has an independent controller per CPU cluster, but we > represent them as a single cpufreq node since there can only be one > systemwide cpufreq device (and since in the future, interactions with > memory controller performance states will also involve cooperation > between multiple frequency domains). > > Signed-off-by: Hector Martin <marcan@xxxxxxxxx> > --- > .../bindings/cpufreq/apple,soc-cpufreq.yaml | 121 ++++++++++++++++++ > 1 file changed, 121 insertions(+) > create mode 100644 Documentation/devicetree/bindings/cpufreq/apple,soc-cpufreq.yaml > > diff --git a/Documentation/devicetree/bindings/cpufreq/apple,soc-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,soc-cpufreq.yaml > new file mode 100644 > index 000000000000..f398c1bd5de5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/cpufreq/apple,soc-cpufreq.yaml > @@ -0,0 +1,121 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/cpufreq/apple,soc-cpufreq.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Apple SoC cpufreq device > + > +maintainers: > + - Hector Martin <marcan@xxxxxxxxx> > + > +description: | > + Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of > + the cluster management register block. This binding uses the standard > + operating-points-v2 table to define the CPU performance states, with the > + opp-level property specifying the hardware p-state index for that level. > + > +properties: > + compatible: > + items: > + - enum: > + - apple,t8103-soc-cpufreq > + - apple,t6000-soc-cpufreq > + - const: apple,soc-cpufreq > + > + reg: > + minItems: 1 > + maxItems: 6 Is the number of clusters fixed for t8103 and t6000? Are these compatibles strictly related to some specific M1 SoC? If yes, then you should have constraints in allOf:if:then. Best regards, Krzysztof
