On 04/05/2022 23:22, matthew.gerlach@xxxxxxxxxxxxxxx wrote:
>
>
> On Wed, 4 May 2022, Krzysztof Kozlowski wrote:
>
>> On 03/05/2022 21:45, matthew.gerlach@xxxxxxxxxxxxxxx wrote:
>>> From: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
>>>
>>> Add a device tree for the n6000 instantiation of Agilex
>>> Hard Processor System (HPS).
>>>
>>> Signed-off-by: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
>>
>>> +
>>> + soc {
>>> + agilex_hps_bridges: bus@80000000 {
>>> + compatible = "simple-bus";
>>> + reg = <0x80000000 0x60000000>,
>>> + <0xf9000000 0x00100000>;
>>> + reg-names = "axi_h2f", "axi_h2f_lw";
>>> + #address-cells = <0x2>;
>>> + #size-cells = <0x1>;
>>> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
>>> +
>>> + hps_cp_eng@0 {
>>
>> No underscores in node names. dtc W=1 should complain about it.
>
> I will remove the underscores in the name. I didn't see a complaint when
> I compiled it with "make W=1" in the kernel tree.
>
>> The node name should be generic, matching class of a device. What is
>> this exactly?
>
> The component is a specialized IP block instantiated in the FPGA directly
> connected to the HPS. In one sense the IP block is a simple DMA
> controller, but it also has some registers for hand shaking between the
> HPS and a host processor connected to the FPGA via PCIe. Should I call
> the node, dma@0?
Then maybe the closest is dma-controller.
Best regards,
Krzysztof
