Hi Angelo,
On Tue, May 03, 2022 at 04:25:36PM +0200, AngeloGioacchino Del Regno wrote:
> Add devicetree and pinfunc bindings for MediaTek Helio X10 MT6795.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
> ---
> .../pinctrl/mediatek,pinctrl-mt6795.yaml | 224 +++++
> include/dt-bindings/pinctrl/mt6795-pinfunc.h | 908 ++++++++++++++++++
> 2 files changed, 1132 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,pinctrl-mt6795.yaml
> create mode 100644 include/dt-bindings/pinctrl/mt6795-pinfunc.h
>
...
> +
> + bias-pull-down:
> + oneOf:
> + - type: boolean
> + - enum: [100, 101, 102, 103]
> + description: mt6795 pull down PUPD/R0/R1 type define value.
> + description: |
> + For normal pull down type, it is not necessary to specify R1R0
> + values; When pull down type is PUPD/R0/R1, adding R1R0 defines
> + will set different resistance values.
> +
> + bias-pull-up:
> + oneOf:
> + - type: boolean
> + - enum: [100, 101, 102, 103]
> + description: mt6795 pull up PUPD/R0/R1 type define value.
> + description: |
> + For normal pull up type, it is not necessary to specify R1R0
> + values; When pull up type is PUPD/R0/R1, adding R1R0 defines
> + will set different resistance values.
> +
> + bias-disable: true
> +
> + output-high: true
> +
> + output-low: true
> +
> + input-enable: true
> +
> + input-disable: true
> +
> + input-schmitt-enable: true
> +
> + input-schmitt-disable: true
> +
> + mediatek,pull-up-adv:
> + description: |
> + Pull up setings for 2 pull resistors, R0 and R1. User can
> + configure those special pins. Valid arguments are described as below:
> + 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
> + 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
> + 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
> + 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1, 2, 3]
> +
> + mediatek,pull-down-adv:
> + description: |
> + Pull down settings for 2 pull resistors, R0 and R1. User can
> + configure those special pins. Valid arguments are described as below:
> + 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
> + 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
> + 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
> + 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1, 2, 3]
I'm actually myself trying to figure out why there are two ways of setting
R0/R1 in the dt-binding (and which should preferred for mt8192 and others):
1. passing 0-3 to mediatek,pull-{up,down}-adv
2. passing one of the MTK_PUPD_SET_R1R0_** flags to bias-pull-{up,down}
When the pin is of type MTK_PULL_PUPD_R1R0_TYPE (which should be the only case
in which it makes sense to consider mediatek,pull-{up,down}-adv AFAIU), they end
up doing the same thing, it's:
mtk_pinconf_bias_set_combo() -> mtk_pinconf_bias_set_pupd_r1_r0()
vs
mtk_pinconf_adv_pull_set()
... and they write to the same registers.
Unless I'm missing something here.
Thanks,
Nícolas
