> On 03/05/2022 12:59, Chanho Park wrote:
> > Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes.
> >
> > Signed-off-by: Chanho Park <chanho61.park@xxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 84 ++++++++++++++++++++
> > 1 file changed, 84 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > index 807d500d6022..32c670b8a9b8 100644
> > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
> > @@ -6,6 +6,7 @@
> > *
> > */
> >
> > +#include <dt-bindings/clock/samsung,exynosautov9.h>
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/soc/samsung,exynos-usi.h>
> >
> > @@ -190,6 +191,89 @@ chipid@10000000 {
> > reg = <0x10000000 0x24>;
> > };
> >
> > + cmu_peris: clock-controller@10020000 {
> > + compatible = "samsung,exynosautov9-cmu-peris";
> > + reg = <0x10020000 0x8000>;
> > + #clock-cells = <1>;
> > +
> > + clocks = <&xtcxo>,
> > + <&cmu_top DOUT_CLKCMU_PERIS_BUS>;
> > + clock-names = "oscclk",
> > + "dout_clkcmu_peris_bus";
> > + };
> > +
> > + cmu_peric0: clock-controller@10200000 {
> > + compatible = "samsung,exynosautov9-cmu-peric0";
> > + reg = <0x10200000 0x8000>;
> > + #clock-cells = <1>;
> > +
> > + clocks = <&xtcxo>,
> > + <&cmu_top DOUT_CLKCMU_PERIC0_BUS>,
> > + <&cmu_top DOUT_CLKCMU_PERIC0_IP>;
> > + clock-names = "oscclk",
> > + "dout_clkcmu_peric0_bus",
> > + "dout_clkcmu_peric0_ip";
> > + };
> > +
> > + cmu_peric1: clock-controller@10800000 {
> > + compatible = "samsung,exynosautov9-cmu-peric1";
> > + reg = <0x10800000 0x8000>;
> > + #clock-cells = <1>;
> > +
> > + clocks = <&xtcxo>,
> > + <&cmu_top DOUT_CLKCMU_PERIC1_BUS>,
> > + <&cmu_top DOUT_CLKCMU_PERIC1_IP>;
> > + clock-names = "oscclk",
> > + "dout_clkcmu_peric1_bus",
> > + "dout_clkcmu_peric1_ip";
> > + };
> > +
> > + cmu_core: clock-controller@1b030000 {
> > + compatible = "samsung,exynosautov9-cmu-core";
> > + reg = <0x1b030000 0x8000>;
> > + #clock-cells = <1>;
> > +
> > + clocks = <&xtcxo>,
> > + <&cmu_top DOUT_CLKCMU_CORE_BUS>;
> > + clock-names = "oscclk",
> > + "dout_clkcmu_core_bus";
> > + };
> > +
> > + cmu_busmc: clock-controller@1b200000 {
> > + compatible = "samsung,exynosautov9-cmu-busmc";
> > + reg = <0x1b200000 0x8000>;
> > + #clock-cells = <1>;
> > +
> > + clocks = <&xtcxo>,
> > + <&cmu_top DOUT_CLKCMU_BUSMC_BUS>;
> > + clock-names = "oscclk",
> > + "dout_clkcmu_busmc_bus";
> > + };
> > +
> > + cmu_top: clock-controller@1b240000 {
> > + compatible = "samsung,exynosautov9-cmu-top";
> > + reg = <0x1b240000 0x8000>;
> > + #clock-cells = <1>;
> > +
> > + clocks = <&xtcxo>;
> > + clock-names = "oscclk";
> > + };
> > +
> > + cmu_fsys2: clock-controller@17c00000 {
>
> This should go before 1b030000.
Oops. Why did I think 1bx < 17c. I'll update them again.
Best Regards,
Chanho Park
