On Mon, 2 May 2022 at 20:55, Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx> wrote:
>
>
>
> On 1.05.2022 21:50, Dmitry Baryshkov wrote:
> > Add device tree node corresponding to the ITS part of GICv3.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> > Reviewed-by: Vinod Koul <vkoul@xxxxxxxxxx>
> > ---
> Hi,
>
> please keep the properties order coherent with other nodes, so:
>
> [compatible]
> [reg]
> [various props]
> [#-cells]
> [ranges]
> [status]
>
Never memorized the order. Thanks for the pointer!
>
> Konrad
>
> > arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > index 3e4c710d3275..4fcb6e2b096b 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> > @@ -2865,6 +2865,9 @@ apps_smmu: iommu@15000000 {
> >
> > intc: interrupt-controller@17100000 {
> > compatible = "arm,gic-v3";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > #interrupt-cells = <3>;
> > interrupt-controller;
> > #redistributor-regions = <1>;
> > @@ -2872,6 +2875,13 @@ intc: interrupt-controller@17100000 {
> > reg = <0x0 0x17100000 0x0 0x10000>, /* GICD */
> > <0x0 0x17180000 0x0 0x200000>; /* GICR * 8 */
> > interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + gic_its: msi-controller@17140000 {
> > + compatible = "arm,gic-v3-its";
> > + msi-controller;
> > + #msi-cells = <1>;
> > + reg = <0x0 0x17140000 0x0 0x20000>;
> > + };
> > };
> >
> > timer@17420000 {
> >
--
With best wishes
Dmitry
