Hi Viraj, Am Montag, dem 02.05.2022 um 12:02 +0200 schrieb Viraj Shah: > This patch queue addresses the power sequence of the display controller > of the imx8mm SoC. The sequence mentioned in example code 5 in section > 5.2.9.5 of reference manual imx-8MMini-yhsc.pdf was not being performed. > This meant that the display controller was not coming up. I don't know where you got the idea that the current implementation doesn't work. Numerous people are using this to get the i.MX8MM display light up. All you need to do is add the various display pipeline peripherals into the virtual power-domains provided by the blk-ctrl driver. The only thing that prevents upstream from having a working display pipeline is the conversion of the exynos-dsi into a proper bridge driver, which has just landed upstream and the addition of a few DT nodes, now that the drivers are getting ready. Regards, Lucas > > Viraj Shah (4): > soc: imx: gpcv2: Power sequence for DISP > soc: imx: imx8m-blk-ctrl: Display Power ON sequence > soc: imx: imx8m-blk-ctrl: Add reset bits for mipi dsi phy > arm64: dts: imx8mm.dtsi: Add resets for dispmix power domain. > > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 + > drivers/soc/imx/gpcv2.c | 36 +++++++++++++++++++---- > drivers/soc/imx/imx8m-blk-ctrl.c | 9 ++++-- > 3 files changed, 38 insertions(+), 8 deletions(-) >
