Re: [PATCH V5 07/16] clk: mediatek: reset: Support nonsequence base offsets of reset registers

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Il 28/04/22 13:56, Rex-BC Chen ha scritto:
The bank offsets are not serial for all reset registers.
For example, there are five infra reset banks for MT8192: 0x120, 0x130,
0x140, 0x150 and 0x730.

To support this,
- Change reg_ofs to rst_bank_ofs which is a pointer to base offsets of
   the reset register.
- Add a new define RST_NR_PER_BANK to define reset number for each
   reset bank.

Signed-off-by: Rex-BC Chen <rex-bc.chen@xxxxxxxxxxxx>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>




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