D1 contains an IOMMU similar to the one in the H6 SoC, but the D1
variant has no external reset signal. It also has some register
definition changes, but none that affect the current driver.
Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx>
---
drivers/iommu/sun50i-iommu.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c
index b9e644b93637..1fb707e37fb3 100644
--- a/drivers/iommu/sun50i-iommu.c
+++ b/drivers/iommu/sun50i-iommu.c
@@ -999,11 +999,15 @@ static int sun50i_iommu_probe(struct platform_device *pdev)
return ret;
}
+static const struct sun50i_iommu_variant sun20i_d1_iommu = {
+};
+
static const struct sun50i_iommu_variant sun50i_h6_iommu = {
.has_reset = true,
};
static const struct of_device_id sun50i_iommu_dt[] = {
+ { .compatible = "allwinner,sun20i-d1-iommu", .data = &sun20i_d1_iommu },
{ .compatible = "allwinner,sun50i-h6-iommu", .data = &sun50i_h6_iommu },
{ /* sentinel */ },
};
--
2.35.1
