The H6 variant of the hardware disables bypass by default. The D1 variant of the hardware enables bypass for all masters by default. Since the driver expects bypass to be disabled, ensure that is the case. Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> --- drivers/iommu/sun50i-iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index ec07b60016d3..b9e644b93637 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -374,6 +374,8 @@ static int sun50i_iommu_enable(struct sun50i_iommu *iommu) spin_lock_irqsave(&iommu->iommu_lock, flags); + iommu_write(iommu, IOMMU_BYPASS_REG, 0); + iommu_write(iommu, IOMMU_TTB_REG, sun50i_domain->dt_dma); iommu_write(iommu, IOMMU_TLB_PREFETCH_REG, IOMMU_TLB_PREFETCH_MASTER_ENABLE(0) | -- 2.35.1
