The following series of patches enables DisplayPort on
j721e-evm
v2:
- use phandle with a parameter to refer clocks insted of
sub nodes in serdes_wiz node
- move phy link node to board DTS file
v3:
- Fix the regulator node name as per the DT spec
- Use Macro for GPIO type
v4:
- Move adding of phy link nodes from 2/2 to 1/2, to fix dtbs checks warnings
- Add leading zeros to align reg property addresses and sizes
- Add empty ports for mhdp node in dtsi file to fix dtbs checks warnings
boot logs:
https://gist.githubusercontent.com/ravi-rahul/1bdbc3f77ab381e486c8394650c2e85d/raw/2327c9894c3236950a00f4511ae668ac4399b71e/j7_DP_upstream.log
kernel patch verify report:
https://gist.githubusercontent.com/ravi-rahul/a982fef3fae03ec0dbdd5cb475a4cb25/raw/9ef482f96fa351cff7980e4340e9bcb8471ec3ab/report-kernel-patch-verify.txt
Tomi Valkeinen (2):
arm64: dts: ti: k3-j721e-*: add DP & DP PHY
arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm
.../dts/ti/k3-j721e-common-proc-board.dts | 77 ++++++++++++++++++-
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 75 +++++++++++++++++-
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 16 ++++
3 files changed, 162 insertions(+), 6 deletions(-)
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2.17.1
