Hi Krzysztof Kozlowski,
Thanks for the feedback.
> Subject: Re: [PATCH 1/2] arm64: dts: renesas: r9a07g044: Fix external clk
> node names
>
> On 24/04/2022 09:50, Biju Das wrote:
> >> Subject: RE: [PATCH 1/2] arm64: dts: renesas: r9a07g044: Fix external
> >> clk node names
> >>
> >> Hi Krzysztof Kozlowski,
> >>
> >> Thanks for the feedback.
> >>
> >>> Subject: Re: [PATCH 1/2] arm64: dts: renesas: r9a07g044: Fix
> >>> external clk node names
> >>>
> >>> On 23/04/2022 16:06, Biju Das wrote:
> >>>> Fix audio clk node names with "_" -> "-" and add suffix '-clk' for
> >>>> can and extal clks.
> >>>>
> >>>> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> >>>> ---
> >>>> arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 8 ++++----
> >>>> 1 file changed, 4 insertions(+), 4 deletions(-)
> >>>>
> >>>> diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> >>>> b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> >>>> index 19287cccb1f0..4f9a84d7af08 100644
> >>>> --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> >>>> +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> >>>> @@ -13,14 +13,14 @@ / {
> >>>> #address-cells = <2>;
> >>>> #size-cells = <2>;
> >>>>
> >>>> - audio_clk1: audio_clk1 {
> >>>> + audio_clk1: audio-clk1 {
> >>>
> >>> How about in such case keeping suffix "clk" everywhere and moving
> >>> the index
> >>> (1/2) to the first part? This way one day maybe schema will match
> >>> the clocks.
> >>
> >> Just a question,
> >>
> >> Your suggestion is "audio_clk1: audio-clk1" -> "audio_clk1: audio-clk"
> >>
> >> In that case, If you plan to drop the label in future, how will you
> >> differentiate between
> >> audio-clk1 and audio-clk2 with just node names?
> >
> > Or
> >
> > Do you want me to do the change like this?
> >
> > "audio_clk1: audio-clk1" -> "audio_clk_1: audio-clk-1"
> >
> > And fix the phandle reference in other dtsi files??
>
> My suggestion was to move the [12] part into the first part, so the suffix
> "clk" stays consistent:
> audio1-clk
> audio2-clk
>From HW perspective, there are 2 audio clocks, audio clock1(multiple and sub multiple of 44.1 Khz)
and audio clk 2(Multiple and submultiple of 48Khz) connected to a single audio Codec.
Based on the sampling rate, through clock generator driver we can switch the clock source for
audio mclock along with audio clock for SSI and we can support both these rates
Since there is a single audio codec, I am not sure, audio1-clk and audio2-clk is a good choise.
What about like
audio_clk1: audio-clk-1 ?
audio_clk2: audio-clk-2 ?
Which is consistent with naming used for cpu and opp-tables?
Cheers,
Biju
