On 4/22/22 10:41 AM, icenowy@xxxxxxxxxxx wrote: > From: Icenowy Zheng <icenowy@xxxxxxx> > > R329 has a CPUX CCU and a R-CCU, with all PLLs in R-CCU. > > Add bindings for them, with R-CCU only taking 3 oscillators as input and > main CCU taking oscillators + PLLs as input. > > Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx> > --- > .../clock/allwinner,sun4i-a10-ccu.yaml | 62 ++++++++++++++-- > include/dt-bindings/clock/sun50i-r329-ccu.h | 73 +++++++++++++++++++ > include/dt-bindings/clock/sun50i-r329-r-ccu.h | 45 ++++++++++++ > include/dt-bindings/reset/sun50i-r329-ccu.h | 45 ++++++++++++ > include/dt-bindings/reset/sun50i-r329-r-ccu.h | 24 ++++++ > 5 files changed, 241 insertions(+), 8 deletions(-) > create mode 100644 include/dt-bindings/clock/sun50i-r329-ccu.h > create mode 100644 include/dt-bindings/clock/sun50i-r329-r-ccu.h > create mode 100644 include/dt-bindings/reset/sun50i-r329-ccu.h > create mode 100644 include/dt-bindings/reset/sun50i-r329-r-ccu.h > > diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml > index 15ed64d35261..c7a429e55483 100644 > --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml > +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml > @@ -45,6 +45,8 @@ properties: > - allwinner,sun50i-h6-r-ccu > - allwinner,sun50i-h616-ccu > - allwinner,sun50i-h616-r-ccu > + - allwinner,sun50i-r329-ccu > + - allwinner,sun50i-r329-r-ccu > - allwinner,suniv-f1c100s-ccu > - nextthing,gr8-ccu > > @@ -106,6 +108,7 @@ else: > - allwinner,sun50i-a100-ccu > - allwinner,sun50i-h6-ccu > - allwinner,sun50i-h616-ccu > + - allwinner,sun50i-r329-r-ccu > > then: > properties: > @@ -118,14 +121,57 @@ else: > maxItems: 3 > > else: > - properties: > - clocks: > - minItems: 2 > - maxItems: 2 > - > - clock-names: > - minItems: 2 > - maxItems: 2 > + if: > + properties: > + compatible: > + const: allwinner,sun50i-r329-ccu > + then: > + properties: > + clocks: > + minItems: 13 > + maxItems: 13 The conditional part of the binding can only be more restrictive than the main binding. So you need to increase maxItems above. Also, I believe minItems/maxItems in this section is not needed when specifying a list of items. > + items: > + - description: High Frequency Oscillator (usually at 24MHz) > + - description: Low Frequency Oscillator (usually at 32kHz) > + - description: Internal Oscillator > + - description: CPUX PLL > + - description: Peripherals PLL > + - description: Peripherals PLL (2x) > + - description: Peripherals PLL derivated 800MHz clock > + - description: Audio PLL 0 > + - description: Audio PLL 0 (/2) > + - description: Audio PLL 0 (/5) > + - description: Audio PLL 1 > + - description: Audio PLL 1 (2x) > + - description: Audio PLL 1 (4x) > + > + clock-names: > + minItems: 13 > + maxItems: 13 > + items: > + - const: hosc > + - const: losc > + - const: iosc > + - const: pll-cpux > + - const: pll-periph > + - const: pll-periph-2x > + - const: pll-periph-800m > + - const: pll-audio0 > + - const: pll-audio0-div2 > + - const: pll-audio0-div5 > + - const: pll-audio1 > + - const: pll-audio1-2x > + - const: pll-audio1-4x > + > + else: > + properties: > + clocks: > + minItems: 2 > + maxItems: 2 > + > + clock-names: > + minItems: 2 > + maxItems: 2 > > additionalProperties: false > > diff --git a/include/dt-bindings/clock/sun50i-r329-ccu.h b/include/dt-bindings/clock/sun50i-r329-ccu.h > new file mode 100644 > index 000000000000..116f8d13a9b3 > --- /dev/null > +++ b/include/dt-bindings/clock/sun50i-r329-ccu.h > @@ -0,0 +1,73 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2021 Sipeed > + */ > + > +#ifndef _DT_BINDINGS_CLK_SUN50I_R329_CCU_H_ > +#define _DT_BINDINGS_CLK_SUN50I_R329_CCU_H_ > + > +#define CLK_CPUX 1 > + > +#define CLK_APB1 5 > + > +#define CLK_CE 7 > +#define CLK_BUS_CE 8 > +#define CLK_AIPU 9 > +#define CLK_BUS_AIPU 10 > +#define CLK_BUS_DMA 11 > +#define CLK_BUS_MSGBOX 12 > +#define CLK_BUS_SPINLOCK 13 > +#define CLK_BUS_HSTIMER 14 > +#define CLK_AVS 15 > +#define CLK_BUS_DBG 16 > +#define CLK_BUS_PWM 17 > + > +#define CLK_MBUS_DMA 19 > +#define CLK_MBUS_CE 20 > +#define CLK_MBUS_R_DMA 21 > +#define CLK_MBUS_NAND 22 > +#define CLK_MBUS_AIPU 23 > + > +#define CLK_NAND0 25 > +#define CLK_NAND1 26 > +#define CLK_BUS_NAND 27 > +#define CLK_MMC0 28 > +#define CLK_MMC1 29 > +#define CLK_BUS_MMC0 30 > +#define CLK_BUS_MMC1 31 > +#define CLK_BUS_UART0 32 > +#define CLK_BUS_UART1 33 > +#define CLK_BUS_UART2 34 > +#define CLK_BUS_UART3 35 > +#define CLK_BUS_I2C0 36 > +#define CLK_BUS_I2C1 37 > +#define CLK_BUS_SCR 38 > +#define CLK_SPI0 39 > +#define CLK_SPI1 40 > +#define CLK_BUS_SPI0 41 > +#define CLK_BUS_SPI1 42 > +#define CLK_EMAC_25M_DIV 43 > +#define CLK_EMAC_25M 44 > +#define CLK_BUS_EMAC 45 > +#define CLK_IR_RX 46 > +#define CLK_BUS_IR_RX 47 > +#define CLK_IR_TX 48 > +#define CLK_BUS_IR_TX 49 > +#define CLK_I2S0 50 > +#define CLK_I2S1 51 > +#define CLK_BUS_I2S0 52 > +#define CLK_BUS_I2S1 53 > +#define CLK_SPDIF 54 > +#define CLK_BUS_SPDIF 55 > +#define CLK_USB_OHCI0 56 > +#define CLK_USB_PHY0 57 > +#define CLK_USB_OHCI1 58 > +#define CLK_USB_PHY1 59 > +#define CLK_BUS_OHCI0 60 > +#define CLK_BUS_OHCI1 61 > +#define CLK_BUS_EHCI0 62 > +#define CLK_BUS_OTG 63 > +#define CLK_LEDC 64 > +#define CLK_BUS_LEDC 65 > + > +#endif /* _DT_BINDINGS_CLK_SUN50I_R329_CCU_H_ */ > diff --git a/include/dt-bindings/clock/sun50i-r329-r-ccu.h b/include/dt-bindings/clock/sun50i-r329-r-ccu.h > new file mode 100644 > index 000000000000..c327d1a1b602 > --- /dev/null > +++ b/include/dt-bindings/clock/sun50i-r329-r-ccu.h > @@ -0,0 +1,45 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2021 Sipeed > + */ > + > +#ifndef _DT_BINDINGS_CLK_SUN50I_R329_R_CCU_H_ > +#define _DT_BINDINGS_CLK_SUN50I_R329_R_CCU_H_ > + > +#define CLK_PLL_CPUX 0 > +#define CLK_PLL_PERIPH_2X 2 > +#define CLK_PLL_PERIPH_800M 3 > +#define CLK_PLL_PERIPH 4 > +#define CLK_PLL_AUDIO0 5 > +#define CLK_PLL_AUDIO0_DIV2 6 > +#define CLK_PLL_AUDIO0_DIV5 7 > +#define CLK_PLL_AUDIO1_4X 8 > +#define CLK_PLL_AUDIO1_2X 9 > +#define CLK_PLL_AUDIO1 10 > + > +#define CLK_R_AHB 11 > +#define CLK_R_APB1 12 > + > +#define CLK_R_BUS_GPADC 14 These are a bit backward. For example, this is the bus clock for the R_GPADC peripheral. So I would recommend s/R_BUS/BUS_R/ here and for the resets. At least that's what I did for D1. Regards, Samuel > +#define CLK_R_BUS_THS 15 > +#define CLK_R_BUS_DMA 16 > +#define CLK_R_PWM 17 > +#define CLK_R_BUS_PWM 18 > +#define CLK_R_CODEC_ADC 19 > +#define CLK_R_CODEC_DAC 20 > +#define CLK_R_BUS_CODEC 21 > +#define CLK_R_DMIC 22 > +#define CLK_R_BUS_DMIC 23 > +#define CLK_R_BUS_LRADC 24 > +#define CLK_R_I2S 25 > +#define CLK_R_I2S_ASRC 26 > +#define CLK_R_BUS_I2S 27 > +#define CLK_R_BUS_UART 28 > +#define CLK_R_BUS_I2C 29 > +#define CLK_R_IR 30 > +#define CLK_R_BUS_IR 31 > +#define CLK_R_BUS_MSGBOX 32 > +#define CLK_R_BUS_SPINLOCK 33 > +#define CLK_R_BUS_RTC 34 > + > +#endif /* _DT_BINDINGS_CLK_SUN50I_R329_R_CCU_H_ */ > diff --git a/include/dt-bindings/reset/sun50i-r329-ccu.h b/include/dt-bindings/reset/sun50i-r329-ccu.h > new file mode 100644 > index 000000000000..bb704a82443f > --- /dev/null > +++ b/include/dt-bindings/reset/sun50i-r329-ccu.h > @@ -0,0 +1,45 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ > +/* > + * Copyright (c) 2021 Sipeed > + */ > + > +#ifndef _DT_BINDINGS_RST_SUN50I_R329_CCU_H_ > +#define _DT_BINDINGS_RST_SUN50I_R329_CCU_H_ > + > +#define RST_MBUS 0 > +#define RST_BUS_CE 1 > +#define RST_BUS_AIPU 2 > +#define RST_BUS_DMA 3 > +#define RST_BUS_MSGBOX 4 > +#define RST_BUS_SPINLOCK 5 > +#define RST_BUS_HSTIMER 6 > +#define RST_BUS_DBG 7 > +#define RST_BUS_PWM 8 > +#define RST_BUS_DRAM 9 > +#define RST_BUS_NAND 10 > +#define RST_BUS_MMC0 11 > +#define RST_BUS_MMC1 12 > +#define RST_BUS_UART0 13 > +#define RST_BUS_UART1 14 > +#define RST_BUS_UART2 15 > +#define RST_BUS_UART3 16 > +#define RST_BUS_I2C0 17 > +#define RST_BUS_I2C1 18 > +#define RST_BUS_SCR 19 > +#define RST_BUS_SPI0 20 > +#define RST_BUS_SPI1 21 > +#define RST_BUS_EMAC 22 > +#define RST_BUS_IR_RX 23 > +#define RST_BUS_IR_TX 24 > +#define RST_BUS_I2S0 25 > +#define RST_BUS_I2S1 26 > +#define RST_BUS_SPDIF 27 > +#define RST_USB_PHY0 28 > +#define RST_USB_PHY1 29 > +#define RST_BUS_OHCI0 30 > +#define RST_BUS_OHCI1 31 > +#define RST_BUS_EHCI0 32 > +#define RST_BUS_OTG 33 > +#define RST_BUS_LEDC 34 > + > +#endif /* _DT_BINDINGS_RST_SUN50I_R329_CCU_H_ */ > diff --git a/include/dt-bindings/reset/sun50i-r329-r-ccu.h b/include/dt-bindings/reset/sun50i-r329-r-ccu.h > new file mode 100644 > index 000000000000..40644f2f21c6 > --- /dev/null > +++ b/include/dt-bindings/reset/sun50i-r329-r-ccu.h > @@ -0,0 +1,24 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ > +/* > + * Copyright (c) 2021 Sipeed > + */ > + > +#ifndef _DT_BINDINGS_RST_SUN50I_R329_R_CCU_H_ > +#define _DT_BINDINGS_RST_SUN50I_R329_R_CCU_H_ > + > +#define RST_R_BUS_GPADC 0 > +#define RST_R_BUS_THS 1 > +#define RST_R_BUS_DMA 2 > +#define RST_R_BUS_PWM 3 > +#define RST_R_BUS_CODEC 4 > +#define RST_R_BUS_DMIC 5 > +#define RST_R_BUS_LRADC 6 > +#define RST_R_BUS_I2S 7 > +#define RST_R_BUS_UART 8 > +#define RST_R_BUS_I2C 9 > +#define RST_R_BUS_IR 10 > +#define RST_R_BUS_MSGBOX 11 > +#define RST_R_BUS_SPINLOCK 12 > +#define RST_R_BUS_RTC 13 > + > +#endif /* _DT_BINDINGS_RST_SUN50I_R329_R_CCU_H_ */ >
