On 23/04/2022 15:39, Dmitry Baryshkov wrote: > On Qualcomm platforms each group of 32 MSI vectors is routed to the > separate GIC interrupt. Document mapping of additional interrupts. Is it on every Qualcomm platform? How many per each variant? IOW, this should have a per-compatible constraints, if possible. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 04fda2a4bb60..71b3be5570dd 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -49,11 +49,21 @@ properties: > - atu # ATU address space (optional) Best regards, Krzysztof
