在 2022-04-22星期五的 18:59 -0500，Samuel Holland写道： > On 4/22/22 10:56 AM, icenowy@xxxxxxxxxxx wrote: > > From: Icenowy Zheng <icenowy@xxxxxxx> > > > > R329 has two SPI controllers. One of it is quite similar to > > previous > > ones, but with internal clock divider removed; the other added MIPI > > DBI > > Type-C offload based on the first one. > > > > Add basical support for these controllers. As we're not going to > > support the DBI functionality now, just implement the two kinds of > > controllers as the same. > > I'm curious what speeds you were able to use SPI at. On D1, with > effectively > these same changes, I would always get corrupted data when reading > from the > onboard SPI NAND on the Nezha board. However, if I enabled the "new > mode of > sample timing" (bit 2 in GBL_CTL_REG), I got the correct data. Oh my usage never read from device now, because it's a write-only MIPI DBI panel. > > Regards, > Samuel
