Quoting Conor Dooley (2022-04-13 00:58:30)
> The fic clocks passed to the pcie controller and other peripherals in
> the device tree are not the clocks they actually run on. The fics are
> actually clock domain crossers & the clock config blocks output is the
> mss/cpu side input to the interconnect. The peripherals are actually
> clocked by fixed frequency clocks embedded in the fpga fabric.
>
> Fix the device tree so that these peripherals use the correct clocks.
> The fabric side FIC0 & FIC1 inputs both use the same 125 MHz, so only
> one clock is created for them.
>
> Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
> Reviewed-by: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx>
> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> ---
Applied to clk-fixes
