Re: [PATCH v2 2/3] arm64: dts: qcom: sm8250: camss: Add CAMSS block definition

["Bryan O'Donoghue" <bryan.odonoghue@xxxxxxxxxx>]

On 14/04/2022 08:45, Vladimir Zapolskiy wrote:
> Hi Bryan,
>
> On 4/14/22 02:17, Bryan O'Donoghue wrote:
> > Adds a CAMSS definition block.
> >
> > Co-developed-by: Julian Grahsl <jgrahsl@xxxxxxxx>
> > Signed-off-by: Julian Grahsl <jgrahsl@xxxxxxxx>
> > Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
> > ---
> >   arch/arm64/boot/dts/qcom/sm8250.dtsi | 153 +++++++++++++++++++++++++++
> >   1 file changed, 153 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi 
> > b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > index 906bc8ed25b7..c69a8a88657a 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > @@ -3150,6 +3150,159 @@ videocc: clock-controller@abf0000 {
> >               #power-domain-cells = <1>;
> >           };
> > +        camss: camss@ac6a000 {
> > +            compatible = "qcom,sm8250-camss";
> > +            status = "disabled";
> > +
> > +            reg = <0 0xac6a000 0 0x2000>,
> > +                  <0 0xac6c000 0 0x2000>,
> > +                  <0 0xac6e000 0 0x1000>,
> > +                  <0 0xac70000 0 0x1000>,
> > +                  <0 0xac72000 0 0x1000>,
> > +                  <0 0xac74000 0 0x1000>,
> > +                  <0 0xacb4000 0 0xd000>,
> > +                  <0 0xacc3000 0 0xd000>,
> > +                  <0 0xacd9000 0 0x2200>,
> > +                  <0 0xacdb200 0 0x2200>;
> > +            reg-names = "csiphy0",
> > +                    "csiphy1",
> > +                    "csiphy2",
> > +                    "csiphy3",
> > +                    "csiphy4",
> > +                    "csiphy5",
> > +                    "vfe0",
> > +                    "vfe1",
> > +                    "vfe_lite0",
> > +                    "vfe_lite1";
> > +
> > +            interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
> > +                     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
> > +            interrupt-names = "csiphy0",
> > +                      "csiphy1",
> > +                      "csiphy2",
> > +                      "csiphy3",
> > +                      "csiphy4",
> > +                      "csiphy5",
> > +                      "csid0",
> > +                      "csid1",
> > +                      "csid2",
> > +                      "csid3",
> > +                      "vfe0",
> > +                      "vfe1",
> > +                      "vfe_lite0",
> > +                      "vfe_lite1";
> > +
> > +            power-domains = <&camcc IFE_0_GDSC>,
> > +                    <&camcc IFE_1_GDSC>,
> > +                    <&camcc TITAN_TOP_GDSC>;
> > +
>
> do you need to add 'power-domain-names' property here as well?

I looked at this, I don't believe camss depends on it, sdm845 since it 
does dev_pm_domain_attach_by_id() instead of dev_pm_domain_attach_by_name()
> > +            interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc 
> > SLAVE_CAMERA_CFG>,
> > +                    <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
> > +                    <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
> > +                    <&mmss_noc MASTER_CAMNOC_ICP &mc_virt 
> > SLAVE_EBI_CH0>;
>
> Recently there was a discussion on the list that interconnects are 2-cells,
> if so, the array above should be updated accordingly.

Hmm. The above NOC nodes are declared <1> for me, I'll look into this 
some more though.