Hi Geert, On Thu, 14 Apr 2022 13:48:22 +0200 Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > Hi Hervé, > > On Thu, Apr 14, 2022 at 1:29 PM Herve Codina <herve.codina@xxxxxxxxxxx> wrote: > > On Thu, 14 Apr 2022 10:45:54 +0200 > > Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > > On Thu, Apr 14, 2022 at 9:40 AM Herve Codina <herve.codina@xxxxxxxxxxx> wrote: > > > > The PCI rcar-gen2 does not call any clk_prepare_enable(). > > > > > > Correct, this driver manages the clocks indirectly through Runtime PM. > > > > > > > This lead to an access failure when the driver tries to access > > > > the IP (at least on a RZ/N1D platform). > > > > > > I expect adding > > > > > > power-domans = <&sysctrl>; > > > > > > to the pci_usb node makes this patch redundant. > > > > Seems not enough. > > I tried what you suggest : > > - Added 'power-domains = <&systrl>;' to the pci_usb node > > - Added missing '#power-domain-cells = <0>;' to sysctrl node > > - Reverted my patch. > > > > The system crashed at boot: > > > [ 0.832958] Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848 > > That's indeed a typical symptom of accessing a module's registers > while the module's clock is disabled. > > > I also added a trace printk in r9a06g032-clocks.c and > > r9a06g032_attach_dev() was never called. > > > > Did I miss to set something ? > > Do you have CONFIG_PM and CONFIG_PM_GENERIC_DOMAINS > enabled? > Apparently ARCH_RZN1 does not select these options yet. > Thanks a lot for pointing this. I added select CONFIG_PM and CONFIG_PM_GENERIC_DOMAINS in ARCH_RZN1 and it works. I will remove my patch calling clk_bulk_prepare_enable() and add some new patches to enable power domains in the v3 series. Regards, Hervé
