Hi Yoshihiro >-----Original Message----- >From: Yoshihiro Shimoda [mailto:yoshihiro.shimoda.uh@xxxxxxxxxxx] >Sent: Thursday, April 14, 2022 8:01 AM >To: alim.akhtar@xxxxxxxxxxx; avri.altman@xxxxxxx; robh+dt@xxxxxxxxxx; >krzk+dt@xxxxxxxxxx >Cc: jejb@xxxxxxxxxxxxx; martin.petersen@xxxxxxxxxx; linux- >scsi@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-renesas- >soc@xxxxxxxxxxxxxxx; Yoshihiro Shimoda ><yoshihiro.shimoda.uh@xxxxxxxxxxx> >Subject: [PATCH v2 2/7] ufs: add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS > >Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for a broken host controller of >the 64-bit addressing supported capability. > A little more details in the commit message will help to understand the changes more. Does it mean this HCI has other addressing mode (other than 32 and 64)? Like a 36bit address? In that case, does Host controller is behind any IOMMU? >Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> >--- > drivers/scsi/ufs/ufshcd.c | 3 ++- > drivers/scsi/ufs/ufshcd.h | 6 ++++++ > 2 files changed, 8 insertions(+), 1 deletion(-) > >diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index >3f9caafa91bf..a7bb3945c7c6 100644 >--- a/drivers/scsi/ufs/ufshcd.c >+++ b/drivers/scsi/ufs/ufshcd.c >@@ -9513,7 +9513,8 @@ EXPORT_SYMBOL_GPL(ufshcd_dealloc_host); > */ > static int ufshcd_set_dma_mask(struct ufs_hba *hba) { >- if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) { >+ if (!(hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS) && >+ hba->capabilities & MASK_64_ADDRESSING_SUPPORT) { > if (!dma_set_mask_and_coherent(hba->dev, >DMA_BIT_MASK(64))) > return 0; > } >diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index >94f545be183a..1745144eb904 100644 >--- a/drivers/scsi/ufs/ufshcd.h >+++ b/drivers/scsi/ufs/ufshcd.h >@@ -602,6 +602,12 @@ enum ufshcd_quirks { > * support physical host configuration. > */ > UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16, >+ >+ /* >+ * This quirk needs to be enabled if the host controller has >+ * 64-bit addressing supported capability but it doesn't work. >+ */ >+ UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS = 1 << 17, > }; > > enum ufshcd_caps { >-- >2.25.1
