On Fri, Apr 08, 2022 at 06:45:18PM +0800, Cixi Geng wrote: > From: Cixi Geng <cixi.geng1@xxxxxxxxxx> > > add a new bindings to describe ums512 clock compatible string. s/add a/Add/ > > Signed-off-by: Cixi Geng <cixi.geng1@xxxxxxxxxx> > --- > .../bindings/clock/sprd,ums512-clk.yaml | 100 ++++++++++++++++++ > 1 file changed, 100 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml > > diff --git a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml > new file mode 100644 > index 000000000000..a80bd6ca4a7a > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml > @@ -0,0 +1,100 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright 2022 Unisoc Inc. > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: UMS512 Clock Control Unit Device Tree Bindings > + > +maintainers: > + - Orson Zhai <orsonzhai@xxxxxxxxx> > + - Baolin Wang <baolin.wang7@xxxxxxxxx> > + - Chunyan Zhang <zhang.lyra@xxxxxxxxx> > + > +properties: > + "#clock-cells": > + const: 1 > + > + compatible: > + enum: > + - sprd,ums512-aon-gate > + - sprd,ums512-apahb-gate > + - sprd,ums512-apapb-gate > + - sprd,ums512-audcpahb-gate > + - sprd,ums512-audcpapb-gate > + - sprd,ums512-g0-pll > + - sprd,ums512-g2-pll > + - sprd,ums512-g3-pll > + - sprd,ums512-gc-pll > + - sprd,ums512-gpu-clk > + - sprd,ums512-mm-clk > + - sprd,ums512-mm-gate-clk > + - sprd,ums512-pmu-gate > + > + clocks: > + minItems: 1 > + maxItems: 4 > + description: | > + The input parent clock(s) phandle for this clock, only list fixed > + clocks which are declared in devicetree. > + > + clock-names: > + minItems: 1 > + items: > + - const: ext-26m > + - const: ext-32k > + - const: ext-4m > + - const: rco-100m > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - '#clock-cells' > + > +if: > + properties: > + compatible: > + enum: > + - sprd,ums512-ap-clk > + - sprd,ums512-aonapb-clk > +then: > + required: > + - reg > + > +else: > + description: | > + Other UMS512 clock nodes should be the child of a syscon node in > + which compatible string should be: > + "sprd,ums512-glbregs", "syscon", "simple-mfd" This doesn't match your example. > + > + The 'reg' property for the clock node is also required if there is a sub > + range of registers for the clocks. > + > +additionalProperties: false > + > +examples: > + - | > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + ap_clk: clock-controller@20200000 { > + compatible = "sprd,ums512-ap-clk"; > + reg = <0 0x20200000 0 0x1000>; > + clocks = <&ext_26m>; > + clock-names = "ext-26m"; > + #clock-cells = <1>; > + }; > + > + syscon@20100000{ > + compatible = "sprd,ums512-glbregs", "syscon","simple-mfd"; > + reg = <0 0x20100000 0 0x4000>; > + clocks = <&ext_32k>, <&ext_26m>; > + clock-names = "ext-32k", "ext-26m"; > + #clock-cells = <1>; > + }; > + }; > +... > -- > 2.25.1 > >
