On Wed 23 Mar 15:30 CDT 2022, Bhupesh Sharma wrote: > Add power-domain entries for UFS phy node in sm8150 dts. > > Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > Cc: Rob Herring <robh@xxxxxxxxxx> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx> > --- > Changes since v3: > ---------------- > - v3 can be found here: https://lore.kernel.org/linux-arm-msm/20220303082140.240745-1-bhupesh.sharma@xxxxxxxxxx/ > - Dropped [PATCH 1/2] from v3, which is already in linux-next now. > - Addressed Dmitry's and Bjorn's review comments. > - This patch is rebase on linux-next. > > arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index 6012322a5984..eed601e70229 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -1637,6 +1637,7 @@ ufs_mem_hc: ufshc@1d84000 { > phy-names = "ufsphy"; > lanes-per-direction = <2>; > #reset-cells = <1>; > + > resets = <&gcc GCC_UFS_PHY_BCR>; > reset-names = "rst"; > > @@ -1687,6 +1688,8 @@ ufs_mem_phy: phy@1d87000 { > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, > <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > > + power-domains = <&gcc UFS_PHY_GDSC>; > + power-domain-names = "ufs_phy_gdsc"; As far as I can tell the UFS PHY sits in the MX domain, while the controller and perhaps the connection between the two sits in UFS_PHY_GDSC. So I believe the power-domains should be moved to the &ufs_mem_hc node. There's no need for power-domain-names in either case. Regards, Bjorn > resets = <&ufs_mem_hc 0>; > reset-names = "ufsphy"; > status = "disabled"; > -- > 2.35.1 >
