I have replied with my Tested-by to the commit 8ae0117418f3 ("PCI: qcom:
Add support for handling MSIs from 8 endpoints"). However lately I
noticed that during the tests I still had 'pcie_pme=nomsi', so the
device was not forced to use higher MSI vectors.
After removing this option I noticed that hight MSI vectors are not
delivered on tested platforms. After additional research I stumbled upon
a patch in msm-4.14 ([1]), which describes that each group of MSI
vectors is mapped to the separate interrupt. Implement corresponding
mapping.
[1] https://git.codelinaro.org/clo/la/kernel/msm-4.14/-/commit/671a3d5f129f4bfe477152292ada2194c8440d22
Dmitry Baryshkov (4):
PCI: qcom: Handle MSI IRQs properly
dt-bindings: pci: qcom: Document additional PCI MSI interrupts
arm64: dts: qcom: sm8250: remove snps,dw-pcie compatibles
arm64: dts: qcom: sm8250: provide additional MSI interrupts
.../devicetree/bindings/pci/qcom,pcie.txt | 4 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 17 ++++--
drivers/pci/controller/dwc/pci-dra7xx.c | 2 +-
drivers/pci/controller/dwc/pci-exynos.c | 2 +-
.../pci/controller/dwc/pcie-designware-host.c | 54 ++++++++++++++-----
drivers/pci/controller/dwc/pcie-designware.h | 3 +-
drivers/pci/controller/dwc/pcie-keembay.c | 2 +-
drivers/pci/controller/dwc/pcie-qcom.c | 1 +
drivers/pci/controller/dwc/pcie-spear13xx.c | 2 +-
drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
10 files changed, 65 insertions(+), 24 deletions(-)
--
2.35.1
