Re: [PATCH v1 0/7] Add rtc refclk support for PolarFire SoC

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On 08/04/2022 16:29, Conor Dooley wrote:


On 08/04/2022 15:57, Krzysztof Kozlowski wrote:
On 08/04/2022 16:36, Conor Dooley wrote:
Hey,
As I mentioned in my fixes for 5.18 [0], found out that the reference
clock for the rtc is actually missing from the clock driver (and the
dt binding).

Currently the mpfs clock driver uses a reference clock called the
"msspll", set in the device tree, as the parent for the cpu/axi/ahb
(config) clocks. The frequency of the msspll is determined by the FPGA
bitstream & the bootloader configures the clock to match the bitstream.
The real reference is provided by a 100 or 125 MHz off chip oscillator.

However, the msspll clock is not actually the parent of all clocks on
the system - the reference clock for the rtc/mtimer actually has the
off chip oscillator as its parent.

This series enables reading the rate of the msspll clock, converts
the refclock in the device tree to the external reference & adds
the missing rtc reference clock.

I assume it is okay not to add fixes tags for the rtc dt binding?
Since the clock was previously missing, the binding is wrong, but
idk if that qualifies as a fix?

Usually ABI breakage, even if accepted, should be be tagged as fix
because it is clearly then a break of other peoples' trees...


That means either a) do something messy in the clock driver or b) mark
the whole series as fixes (and roll it into [0]).

The second option seems far more sensible to me, do you agree?

Having thought some more about it, patches 2, 3 and the rtc part of 7
should be moved into [0] since they're fixing a binding that only
arrived in 5.18-rc1.
For the rest, make the second part of the reg optional and if it doesnt
exist just return prate for the msspll clock?

Thanks,
Conor.



[0] https://lore.kernel.org/linux-riscv/20220408133543.3537118-1-conor.dooley@xxxxxxxxxxxxx/



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