The Cache Coherent Interconnect (CCI) is the management of cache coherency by hardware. CCI DEVFREQ is DVFS driver for power saving by scaling clock frequency and supply voltage of CCI. CCI uses the same input clock source and power rail as LITTLE CPUs on Mediatek SoCs. This series depends on: Chanwoo's repo: kernel/git/chanwoo/linux.git branch: devfreq-testing [1]: PM / devfreq: Export devfreq_get_freq_range symbol within devfreq [2]: PM / devfreq: Add cpu based scaling support to passive governor [3]: PM / devfreq: passive: Reduce duplicate code when passive_devfreq case [4]: PM / devfreq: passive: Update frequency when start governor Changes in v2: - Take MT8183 as example in binding document. - Use dev_err() instead of pr_err(). - Use 'goto' statement to handle error case. - Clean up driver code. Johnson Wang (2): dt-bindings: devfreq: mediatek: Add mtk cci devfreq dt-bindings PM / devfreq: mediatek: Introduce MediaTek CCI devfreq driver .../devicetree/bindings/devfreq/mtk-cci.yaml | 72 +++ drivers/devfreq/Kconfig | 10 + drivers/devfreq/Makefile | 1 + drivers/devfreq/mtk-cci-devfreq.c | 479 ++++++++++++++++++ 4 files changed, 562 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mtk-cci.yaml create mode 100644 drivers/devfreq/mtk-cci-devfreq.c -- 2.18.0
