Re: [PATCH v3 1/2] dt-bindings: clock: convert rockchip,rk3188-cru.txt to YAML

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Am Samstag, 2. April 2022, 18:01:11 CEST schrieb Krzysztof Kozlowski:
> On 02/04/2022 14:20, Johan Jonker wrote:
> > 
> > 
> > On 4/2/22 14:16, Krzysztof Kozlowski wrote:
> >> On 02/04/2022 13:45, Johan Jonker wrote:
> >>>
> >>>
> >>> On 4/2/22 13:41, Krzysztof Kozlowski wrote:
> >>>> On 01/04/2022 09:55, Heiko Stübner wrote:
> >>>>> Hi Stephen,
> >>>>>
> >>>>> Am Freitag, 1. April 2022, 00:51:32 CEST schrieb Stephen Boyd:
> >>>>>> Quoting Johan Jonker (2022-03-29 04:13:22)
> >>>>>>> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml
> >>>>>>> new file mode 100644
> >>>>>>> index 000000000..ddd7e46af
> >>>>>>> --- /dev/null
> >>>>>>> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml
> >>>>>>> @@ -0,0 +1,78 @@
> >>>>>>> +# SPDX-License-Identifier: GPL-2.0
> >>>>>>> +%YAML 1.2
> >>>>>>> +---
> >>>>>>> +$id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml#
> >>>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>>>>> +
> >>>>>>> +title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU)
> >>>>>>> +
> >>>>>>> +maintainers:
> >>>>>>> +  - Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
> >>>>>>> +  - Heiko Stuebner <heiko@xxxxxxxxx>
> >>>>>>> +
> >>>>>>> +description: |
> >>>>>>> +  The RK3188/RK3066 clock controller generates and supplies clocks to various
> >>>>>>> +  controllers within the SoC and also implements a reset controller for SoC
> >>>>>>> +  peripherals.
> >>>>>>> +  Each clock is assigned an identifier and client nodes can use this identifier
> >>>>>>> +  to specify the clock which they consume. All available clocks are defined as
> >>>>>>> +  preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
> >>>>>>> +  dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
> >>>>>>> +  Similar macros exist for the reset sources in these files.
> >>>>>>> +  There are several clocks that are generated outside the SoC. It is expected
> >>>>>>> +  that they are defined using standard clock bindings with following
> >>>>>>> +  clock-output-names:
> >>>>>>> +    - "xin24m"    - crystal input                 - required
> >>>>>>> +    - "xin32k"    - RTC clock                     - optional
> >>>>>>> +    - "xin27m"    - 27mhz crystal input on RK3066 - optional
> >>>>>>> +    - "ext_hsadc" - external HSADC clock          - optional
> >>>>>>> +    - "ext_cif0"  - external camera clock         - optional
> >>>>>>> +    - "ext_rmii"  - external RMII clock           - optional
> >>>>>>> +    - "ext_jtag"  - external JTAG clock           - optional
> >>>>>>
> >>>>>> I'd expect all these clks here to be inputs to this node.
> >>>>>
> >>>>> The optional clocks are all part of a circular dependency.
> >>>>>
> >>>>> So for example xin32k normally is generated by the pmic and fed
> >>>>> back into the system, so to get xin32k, we need the pmic to probe,
> >>>>> which needs i2c, which in turn already needs the clock controller.
> >>>>
> >>>> Are you sure that xin32k (RTC) clock should be input to the clock
> >>>> controller? I would expect it is the input to the SoC RTC block, so
> >>>> there is no circular dependency.
> >>>
> >>> clk-rk3188.c:
> >>>
> >>> PNAME(mux_pll_p)		= { "xin24m", "xin32k" };
> >>
> >> Thanks, but that's not the answer whether it is an input to the clock
> >> controller. It's the answer how the driver implements this. :)
> > 
> > PX2 == rk3066
> > 
> > Rockchip PX2 TRM V1.0.pdf
> > 
> > page 30
> > 
> > Chip Clock Architecture Diagram 1
> 
> I found it, thanks. That's the answer, so indeed this is an input.
> 
> Answering partially to Heiko/Stephen, this could be still modeled in DTS
> as a fixed-frequency clock going as input to the clock-controller. The
> trouble with that approach is that it would actually duplicate the
> definition (another one coming from PMIC).

And it has the issue that the pmic doesn't necessarily has the clock
enabled at boot. Also this would combat one issue by introducing
a different one, as this would be modelling a clock in a way that is
not reflected by hardware at all.





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