>-----Original Message----- >From: Gupta Suresh-B42813 >Sent: Thursday, September 11, 2014 4:42 PM >To: Lu Jingchang-B35083; Guo Shawn-R65073 >Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; Lu >Jingchang-B35083; Badola Nikhil-B46172; Zhao Chenhui-B35336; Leekha >Shaveta-B20052; Gupta Ruchika-R66431; Sharma Bhupesh-B45370; Fu Chao- >B44548; Xiubo Li-B47053; Lu Jingchang-B35083 >Subject: RE: [PATCHv3 1/6] ARM: dts: Add SoC level device tree support for >LS1021A > > > >> -----Original Message----- >> From: Jingchang Lu [mailto:jingchang.lu@xxxxxxxxxxxxx] >> Sent: Tuesday, September 09, 2014 2:42 PM >> To: Guo Shawn-R65073 >> Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; >> Lu Jingchang-B35083; Badola Nikhil-B46172; Zhao Chenhui-B35336; Gupta >> Suresh- B42813; Leekha Shaveta-B20052; Gupta Ruchika-R66431; Sharma >> Bhupesh- B45370; Fu Chao-B44548; Xiubo Li-B47053; Lu Jingchang-B35083 >> Subject: [PATCHv3 1/6] ARM: dts: Add SoC level device tree support for >> LS1021A >> >> From: Jingchang Lu <b35083@xxxxxxxxxxxxx> >> >> Add Freescale LS1021A SoC device tree support >> >> + >> + usb@3100000 { >> + compatible = "fsl,fsl-dwc3"; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + >> + dwc3 { >> + compatible = "snps,dwc3"; >> + reg = <0x0 0x3100000 0x0 0x10000>; >> + interrupts = <GIC_SPI 93 >> IRQ_TYPE_LEVEL_HIGH>; >> + dr_mode = "host"; >> + maximum-speed = "high-speed"; >> + }; >> + }; >> + }; >> + >> + >[SuresH] Can you please pick this node form ls1-linux -> ls1-dev branch >This node should look like > > > usb3@3100000 { > compatible = "snps,dwc3"; > reg = <0x0 0x3100000 0x0 0x10000>; > interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; > dr_mode = "host"; > }; Ok, I will update it in the next version. Best Regards, Jingchang ��.n��������+%������w��{.n����z�{��ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f
