Move UART related GPIO into hog group so that they still are pinmuxed
even if the uart driver is not probed.
Signed-off-by: Tim Harvey <tharvey@xxxxxxxxxxxxx>
---
.../boot/dts/freescale/imx8mm-venice-gw7902.dts | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index edf0c7aaaef0..49e15a671b67 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
@@ -641,7 +641,7 @@
/* RS232/RS485/RS422 selectable */
&uart1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
+ pinctrl-0 = <&pinctrl_uart1>;
rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
status = "okay";
@@ -742,6 +742,10 @@
MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */
+ MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* UART1_HALF */
+ MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* UART1_TERM */
+ MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* UART1_RS485 */
+
>;
};
@@ -886,14 +890,6 @@
>;
};
- pinctrl_uart1_gpio: uart1gpiogrp {
- fsl,pins = <
- MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */
- MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */
- MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */
- >;
- };
-
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
--
2.17.1
