Hi Niklas, On Tue, Mar 8, 2022 at 2:30 PM Niklas Cassel <Niklas.Cassel@xxxxxxx> wrote: > From: Niklas Cassel <niklas.cassel@xxxxxxx> > According to the K210 Standalone SDK Programming guide: > https://canaan-creative.com/wp-content/uploads/2020/03/kendryte_standalone_programming_guide_20190311144158_en.pdf > > Section 15.4.3.3: > SPI0 and SPI1 supports: standard, dual, quad and octal transfers. > SPI3 supports: standard, dual and quad transfers (octal is not supported). > > In order to support quad transfers (Quad SPI), SPI3 must have four IO wires > connected to the SPI flash. > > Update the device tree to specify the correct bus width. > > Tested on maix bit, maix dock and maixduino, which all have the same > SPI flash (gd25lq128d) connected to SPI3. maix go is untested, but it > would not make sense for this k210 board to be designed differently. > > Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxx> > --- > Changes since v1: > -Add the new properties directly after spi-max-frequency for all DT board > files. Thanks for your patch, which is now commit 6846d656106add3a ("riscv: dts: canaan: Fix SPI3 bus width") in v5.18-rc1. > --- a/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts > +++ b/arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts > @@ -203,6 +203,8 @@ flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > spi-max-frequency = <50000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > m25p,fast-read; > broken-flash-reset; > }; On MAiX BiT, I get: +spi spi1.0: setup: ignoring unsupported mode bits a00 spi-nor spi1.0: gd25lq128d (16384 Kbytes) Perhaps this depends on a not-yet-applied patch to add quad support to the SPI driver? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
