[PATCH v3 0/7] Fix AST2600 quad mode SPI pinmux settings

[Jae Hyun Yoo <quic_jaehyoo@xxxxxxxxxxx>]

I�m sending this patch series to fix current issues in AST2600 pinmux
settings while enabling quad mode SPI support.

FWSPI18 pins are basically 1.8v logic pins that are different from the
dedicated FWSPI pins that provide 3.3v logic level, so FWSPI18 pins can�t
be grouped with FWSPIDQ2 and FWSPIDQ3, so this series fix the issue.

Also, fixes QSPI1 and QSPI2 function settings in AST2600 pinctrl dtsi to
make it able to enable quad mode on SPI1 and SPI2 interfaces.

With this series, quad mode pinmux can be set like below.

FW SPI:
&fmc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fwqspi_default>;
}

SPI1:
&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi1_default>;
}

SPI2:
&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_qspi2_default>;
}

Please review.

Thanks,
Jae

Changes in v3:
 * Added bindings patches. (Andrew)

Changes in v2:
 * Rebased it on the latest.

Jae Hyun Yoo (5):
  ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi
  pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl
  dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group
  dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group
  ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group

Johnny Huang (2):
  pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group
  ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi

 .../pinctrl/aspeed,ast2600-pinctrl.yaml         |  4 ++--
 arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi        | 10 +++++-----
 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c      | 17 ++++++++---------
 3 files changed, 15 insertions(+), 16 deletions(-)

-- 
2.25.1