On 29/03/2022 08:51, allen-kh.cheng wrote:
Hi Matthias,
On Mon, 2022-03-28 at 13:10 +0200, Matthias Brugger wrote:
On 18/03/2022 15:45, Allen-KH Cheng wrote:
Add pwm node for mt8192 SoC.
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index f0f0f067c023..ea98b2230f18 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -625,6 +625,17 @@
status = "disabled";
};
+ pwm0: pwm@1100e000 {
+ compatible = "mediatek,mt8183-disp-pwm";
+ reg = <0 0x1100e000 0 0x1000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH
0>;
Binding description is missing interrupt property. Remeber that the
DT should
describe the HW, so we need to update the binding description.
I just wonder what the IRQ signals, as it is not used by the driver.
Definitely
a good candidate to make the commit message more sound. So please add
it there.
Thanks!
Matthias
For interrupt property, we will send anther patch to update binding
and add some information for IRQ into commit message in next version.
Thanks. Would you mind to send the dt-bindings updates in a series together with
the patches from this series that needs changes? This way it will be easier to
track the dependencies.
Please beware to send dt-binding patches as first of the series, so that Rob
Herring can find the rather quick.
Thanks!
Matthias
Thanks,
Allen
+ #pwm-cells = <2>;
+ clocks = <&topckgen CLK_TOP_DISP_PWM_SEL>,
+ <&infracfg CLK_INFRA_DISP_PWM>;
+ clock-names = "main", "mm";
+ status = "disabled";
+ };
+
spi1: spi@11010000 {
compatible = "mediatek,mt8192-spi",
"mediatek,mt6765-spi";
