On 3/17/22 11:23 AM, Andre Przywara wrote: > The F1C100 series contains two SPI controllers, and many boards use SPI0 > for a SPI flash, as the BROM is able to boot from that. > > Describe the two controllers in the SoC .dtsi, and also add the PortC > pins for SPI0, since this is where BROM looks at when trying to boot > from the commonly used SPI flash. > > The SPI controller seems to be the same as in the H3 chips, but it lacks > a separate mod clock. The manual says it's connected to AHB directly. > We don't export that AHB clock directly, but can use the AHB *gate* clock > as a clock source, since the SPI driver is not supposed to change the AHB > frequency anyway. > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> Acked-by: Samuel Holland <samuel@xxxxxxxxxxxx>
