On Thu, 17 Mar 2022 16:23:39 +0000, Andre Przywara wrote: > Most Allwinner SoCs have just one input clock to drive the watchdog > peripheral. So far this is the 24 MHz "HOSC" oscillator, divided down > internally to 32 KHz. > The F1C100 series watchdog however uses the unchanged 32 KHz "LOSC" as > its only clock input, which has the same effect, but let's the binding > description mismatch. > > Change the binding description to name the clocks more loosely, so both > the LOSC and divided HOSC match the description. As the fixed clock names > now make less sense, drop them from SoCs supporting just one clock > input, they were not used by any DT anyway. > > For the newer SoCs, supporting a choice of two input clocks, we keep > both the description and clock-names requirement. > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> > --- > .../watchdog/allwinner,sun4i-a10-wdt.yaml | 20 ++++++++----------- > 1 file changed, 8 insertions(+), 12 deletions(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
