Il 23/03/22 07:56, Jianjun Wang ha scritto:
Add PCIe GEN3 PHY driver support on MediaTek chipsets.
Signed-off-by: Jianjun Wang <jianjun.wang@xxxxxxxxxxxx>
---
drivers/phy/mediatek/Kconfig | 11 ++
drivers/phy/mediatek/Makefile | 1 +
drivers/phy/mediatek/phy-mtk-pcie.c | 272 ++++++++++++++++++++++++++++
3 files changed, 284 insertions(+)
create mode 100644 drivers/phy/mediatek/phy-mtk-pcie.c
..snip..
diff --git a/drivers/phy/mediatek/phy-mtk-pcie.c b/drivers/phy/mediatek/phy-mtk-pcie.c
new file mode 100644
index 000000000000..44a2ad8d324e
--- /dev/null
+++ b/drivers/phy/mediatek/phy-mtk-pcie.c
@@ -0,0 +1,272 @@
..snip..
+/**
+ * struct mtk_pcie_phy - PCIe phy driver main structure
+ * @dev: pointer to device
+ * @phy: pointer to generic phy
+ * @sif_base: IO mapped register base address of system interface
+ * @data: pointer to SoC dependent data
+ * @sw_efuse_en: software eFuse enable status
+ * @efuse_glb_intr: internal resistor selection of TX bias current data
+ * @efuse: pointer to eFues data for each lane
Oops! There's a typo! "eFues" => "eFuse"
After fixing this typo,
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
P.S.: Many thanks for the kerneldoc documentation!!!!
+ */
+struct mtk_pcie_phy {
+ struct device *dev;
+ struct phy *phy;
+ void __iomem *sif_base;
+ const struct mtk_pcie_phy_data *data;
+
+ bool sw_efuse_en;
+ u32 efuse_glb_intr;
+ struct mtk_pcie_lane_efuse *efuse;
+};
