On 3/25/2022 5:10 AM, Krzysztof Kozlowski wrote:
On 25/03/2022 02:03, Jae Hyun Yoo wrote:
From: Graeme Gregory <quic_ggregory@xxxxxxxxxxx>
Add initial version of device tree for Nuvia DC-SCM BMC which is
equipped with Aspeed AST2600 BMC SoC.
Signed-off-by: Graeme Gregory <quic_ggregory@xxxxxxxxxxx>
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@xxxxxxxxxxx>
---
Changes in v2:
* Added a comment to explain 'rgmii' phy mode setting. (Andrew)
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts | 189 ++++++++++++++++++
2 files changed, 190 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7c16f8a2b738..e63cd6ed0faa 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1546,6 +1546,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \
+ aspeed-bmc-nuvia-dc-scm.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-mihawk.dtb \
aspeed-bmc-opp-mowgli.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
new file mode 100644
index 000000000000..1984d545b66e
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
This does not look like DTS comment style (Only SPDX should be in //).
+
+/dts-v1/;
+
+#include "aspeed-g6.dtsi"
+
+/ {
+ model = "Nuvia DC-SCM BMC";
+ compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600";
+
+ aliases {
+ serial4 = &uart5;
+ };
+
+ chosen {
+ bootargs = "console=ttyS4,115200n8";
You should use stdout path instead.
"The format of the .dts "source" file is "C" like, supports C and C++
style comments."
According to the
https://www.kernel.org/doc/Documentation/devicetree/booting-without-of.txt
Thanks,
Jae
