From: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
Fix multi-line comment style.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index f70782d2a23d..de811be435d0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -580,8 +580,10 @@ hdmi_lontium_lt8912: hdmi@48 {
atmel_mxt_ts: touch@4a {
compatible = "atmel,maxtouch";
- /* Verdin GPIO_9_DSI */
- /* (TOUCH_INT#, SODIMM 17, also routed to SN65dsi83 IRQ albeit currently unused) */
+ /*
+ * Verdin GPIO_9_DSI
+ * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI83 IRQ albeit currently unused)
+ */
interrupt-parent = <&gpio3>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
@@ -695,8 +697,8 @@ &uart3 {
uart-has-rtscts;
};
-/* Verdin UART_4 */
/*
+ * Verdin UART_4
* Resource allocated to M4 by default, must not be accessed from Cortex-A35 or you get an OOPS
*/
&uart4 {
@@ -1205,8 +1207,10 @@ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0>;
};
- /* On-module Wi-Fi/BT or type specific SDHC interface */
- /* (e.g. on X52 extension slot of Verdin Development Board) */
+ /*
+ * On-module Wi-Fi/BT or type specific SDHC interface
+ * (e.g. on X52 extension slot of Verdin Development Board)
+ */
pinctrl_usdhc3: usdhc3grp {
fsl,pins =
<MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190>,
--
2.34.1
