Re: [Patch v5 2/4] memory: tegra: Add MC error logging on tegra186 onward

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On 3/19/2022 9:20 PM, Dmitry Osipenko wrote:
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16.03.2022 12:25, Ashish Mhetre пишет:
+irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
  {
       struct tegra_mc *mc = data;
       unsigned long status;
+     bool mc_has_channels;
       unsigned int bit;
+     int channel;

unsigned int

Okay, I will update in next version.

+     mc_has_channels = mc->soc->num_channels && mc->soc->get_int_channel;
+     if (mc_has_channels) {
+             int err;
+
+             err = mc->soc->get_int_channel(mc, &channel);
+             if (err < 0)
+                     return IRQ_NONE;
+
+             /* mask all interrupts to avoid flooding */
+             status = mc_ch_readl(mc, channel, MC_INTSTATUS) & mc->soc->intmask;
+     } else {
+             status = mc_readl(mc, MC_INTSTATUS) & mc->soc->intmask;
+     }

So if mc_has_channels=false, while it should be true, then you're going
to handle interrupt incorrectly?

I am not able to understand the case where this can happen?
num_channels and get_int_channels are both getting defined on T186
onwards where mc_has_channels is expected to be true.
Do you mean to say that we need to add more chip specific checks
in case of mc_has_channels is false?



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