Hi Andrew, > -----Original Message----- > From: Andrew Lunn [mailto:andrew@xxxxxxx] > Sent: 2022年3月21日 8:11 PM > To: Dylan Hung <dylan_hung@xxxxxxxxxxxxxx> > Cc: robh+dt@xxxxxxxxxx; joel@xxxxxxxxx; andrew@xxxxxxxx; > hkallweit1@xxxxxxxxx; linux@xxxxxxxxxxxxxxx; davem@xxxxxxxxxxxxx; > kuba@xxxxxxxxxx; pabeni@xxxxxxxxxx; p.zabel@xxxxxxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-aspeed@xxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > netdev@xxxxxxxxxxxxxxx; BMC-SW <BMC-SW@xxxxxxxxxxxxxx> > Subject: Re: [PATCH 0/2] Add reset deassertion for Aspeed MDIO > > On Mon, Mar 21, 2022 at 03:01:29PM +0800, Dylan Hung wrote: > > Add missing reset deassertion for Aspeed MDIO. There are 4 MDIOs > > embedded in Aspeed AST2600 and share one reset control bit SCU50[3]. > > Is the reset limited to the MDIO bus masters, or are PHYs one the bus > potentially also reset? It is limited to the MDIO bus masters. > > Who asserts the reset in the first place? The hardware asserts the reset by default. > Don't you want the first MDIO bus to > probe to assert and then deassert the reset in order that all the hardware is > reset? Do I still need to add a reset assertion/deassertion if the hardware asserts the reset by default? > > Andrew -- Dylan
