Hi Krzysztof,
> Subject: Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support
> EDAC on imx8mp
>
> On 18/03/2022 12:35, Sherry Sun wrote:
> > i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support for
> > i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 794d75173cf5..a6124a11d6ee 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -902,6 +902,12 @@
> > interrupt-parent = <&gic>;
> > };
> >
> > + edacmc: memory-controller@3d400000 {
> > + compatible = "snps,ddrc-3.80a";
> > + reg = <0x3d400000 0x400000>;
> > + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
>
> This is not correct according to the bindings. Dinh's commit adding the
> compatible might not be correct, so please first fix bindings.
>
> While fixing bindings, order the compatibles by name (s goes before x).
I met some issues when run dt_binding_check and dtbs_check for the dt bindings.
So now I cannot observe the errors what you said in the bindings, but from the logic, I guess I may need to add below fix patch, right? Please correct me if I miss something here.
--- a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml
@@ -24,9 +24,9 @@ description: |
properties:
compatible:
enum:
+ - snps,ddrc-3.80a
- xlnx,zynq-ddrc-a05
- xlnx,zynqmp-ddrc-2.40a
- - snps,ddrc-3.80a
interrupts:
maxItems: 1
@@ -43,7 +43,9 @@ allOf:
properties:
compatible:
contains:
- const: xlnx,zynqmp-ddrc-2.40a
+ enum:
+ - snps,ddrc-3.80a
+ - xlnx,zynqmp-ddrc-2.40a
then:
required:
- interrupts
Best regards
Sherry
>
>
> Best regards,
> Krzysztof
