Add OCMEM node to allow for GPU SRAM access.
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/msm8992.dtsi | 8 ++++++++
arch/arm64/boot/dts/qcom/msm8994.dtsi | 17 +++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 1de1d9c4643d..92c1f87d6bba 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -24,6 +24,14 @@ &mmcc {
<800000000>;
};
+&ocmem {
+ reg = <0xfdd00000 0x2000>, <0xfec00000 0x100000>;
+
+ gmu-sram@0 {
+ reg = <0x0 0x80000>;
+ };
+};
+
&rpmcc {
compatible = "qcom,rpmcc-msm8992";
};
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index a2210cf9d0b4..2f531e93f3c6 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -1052,6 +1052,23 @@ mmcc: clock-controller@fd8c0000 {
<960000000>,
<600000000>;
};
+
+ ocmem: ocmem@fdd00000 {
+ compatible = "qcom,msm8974-ocmem";
+ reg = <0xfdd00000 0x2000>,
+ <0xfec00000 0x200000>;
+ reg-names = "ctrl", "mem";
+ clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
+ <&mmcc OCMEMCX_OCMEMNOC_CLK>;
+ clock-names = "core", "iface";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gmu_sram: gmu-sram@0 {
+ reg = <0x0 0x180000>;
+ };
+ };
};
timer: timer {
--
2.35.1
