On Fri, 2022-03-18 at 15:00 +0800, Andy Chiu wrote:
> Document the new pcs-handle attribute to support connecting to an
> external PHY in SGMII or 1000Base-X modes through the internal PCS/PMA
> PHY.
>
> Signed-off-by: Andy Chiu <andy.chiu@xxxxxxxxxx>
> Reviewed-by: Greentime Hu <greentime.hu@xxxxxxxxxx>
> ---
> Documentation/devicetree/bindings/net/xilinx_axienet.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> index b8e4894bc634..a2fa3bef0901 100644
> --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> @@ -68,6 +68,11 @@ Optional properties:
> required through the core's MDIO interface (i.e. always,
> unless the PHY is accessed through a different bus).
>
> + - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or
> 1000Base-X
> + modes, where "pcs-handle" should be preferably used to point
> + to the PCS/PMA PHY, and "phy-handle" should point to an
> + external PHY if exits.
Spelling: exits -> exists
> +
> Example:
> axi_ethernet_eth: ethernet@40c00000 {
> compatible = "xlnx,axi-ethernet-1.00.a";
--
Robert Hancock
Senior Hardware Designer, Calian Advanced Technologies
www.calian.com
