On 16/03/2022 14:57, Nicolas Belin wrote:
Set the register page length or window length to
0x100 according to the documentation.
Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver")
Signed-off-by: Nicolas Belin <nbelin@xxxxxxxxxxxx>
---
drivers/gpu/drm/bridge/ite-it66121.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ite-it66121.c b/drivers/gpu/drm/bridge/ite-it66121.c
index 06b59b422c69..64912b770086 100644
--- a/drivers/gpu/drm/bridge/ite-it66121.c
+++ b/drivers/gpu/drm/bridge/ite-it66121.c
@@ -227,7 +227,7 @@ static const struct regmap_range_cfg it66121_regmap_banks[] = {
.selector_mask = 0x1,
.selector_shift = 0,
.window_start = 0x00,
- .window_len = 0x130,
+ .window_len = 0x100,
},
};
The documentation we have access to at [1] is confusing:
Reg00 ~ Reg2F are accessible in any register bank.
Reg30~ RegFF are accessible in register bank0
Reg130~ Reg1BF are accessible in register bank1. These are HDMI packet registers.
But indeed it means:
- Reg00 ~ Reg2F: are always accessible, whether bank0 or bank1 is set
- Reg30~ RegFF: only when bank0 is set
- Reg130~ Reg1BF: only when bank0 is set at Reg30~ RegF range
So 0x100 is the right window_len here.
Acked-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
[1] https://rockchip.fr/radxa/IT66121_Register_List_Release_V1.0.pdf
