On Thu, Mar 10, 2022 at 01:52:24PM -0600, nick.hawkins@xxxxxxx wrote: > From: Nick Hawkins <nick.hawkins@xxxxxxx> > > Creating binding for gxp timer in device tree hpe,gxp-timer > Although there are multiple times on the SoC we are only > enabling one at this time. > > Signed-off-by: Nick Hawkins <nick.hawkins@xxxxxxx> > > ---- > > v2: > *Removed maintainer change from patch > *Verified there was no compilation errors > *Added reference code in separate patch of patchset > --- > .../bindings/timer/hpe,gxp-timer.yaml | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml > > diff --git a/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml b/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml > new file mode 100644 > index 000000000000..1f4e345c5fb8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/timer/hpe,gxp-timer.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: HPE GXP TIMER > + > +maintainers: > + - Nick Hawkins <nick.hawkins@xxxxxxx> > + - Jean-Marie Verdun <verdun@xxxxxxx> > + > +properties: > + compatible: > + const: hpe,gxp-timer > + > + reg: > + items: > + - description: T0CNT register > + - description: T0CS register > + - description: TIMELO register Is the spec public to know what T0CNT, T0CS, and TIMELO are? > + > + interrupts: > + maxItems: 1 > + > + clock-frequency: > + description: The frequency of the clock that drives the counter, in Hz. > + > +required: > + - compatible > + - reg > + - interrupts > + - clock-frequency > + > +additionalProperties: false > + > +examples: > + - | > + timer@10003000 { > + compatible = "hpe,gxp-timer"; > + reg = <0xc0000080 0x1>, <0xc0000094 0x01>, <0xc0000088 0x08>; Based on the driver these are 4 bytes, 1 byte, 4 bytes in size. Are there other registers in 0x80-0x95 range or do these offsets change in other chips? If not, just 1 entry covering the whole thing would be better. > + interrupts = <0>; > + interrupt-parent = <&vic0>; > + clock-frequency = <400000000>; > + }; > -- > 2.17.1 > >
